1. Technical Field
The present invention relates to a semiconductor chip and, more particularly, to a semiconductor integrated device wherein a bump for connection to the outside is formed on its surface.
2. Background Art
At present, flip chip mounting (hereinbelow, referred to as FC mounting) is known as a method of directly mounting a semiconductor chip such as an IC (Integrated Circuit) or an LSI (Large Scale Integration) on a substrate. There is also known a semiconductor chip used in the FC mounting, having a surface on which an electrode pad as an external terminal is formed and a bump electrode for connection to the outside is formed on the surface of the electrode pad (refer to, for example, FIG. 3B of Japanese Patent Application Laid-Open No. 2008-135486).
To prevent ESD (electrostatic discharge) damage due to ESD (electrostatic discharge), the semiconductor chip is provided with an electrostatic protection circuit which is, for example, a diode device near the electrode pad.
However, when a surge voltage due to electrostatic discharge is applied to the bump electrode, a case can arise where a voltage is applied simultaneously to both an anode electrode and a cathode electrode of the diode device. Since no current flows in the electrostatic protection circuit in this case, the inherent operation of the electrostatic protection circuit for preventing an electrostatic discharge damage by allowing a current to pass is not performed, and there is a possibility that the electrostatic protection circuit itself is damaged.